An Optimized MAC Unit Using S-MB Recoding Scheme and Compressors
Journal Title: International Journal of Research in Computer and Communication Technology - Year 2016, Vol 5, Issue 4
Abstract
In this paper, we demonstrate a MAC unit using 8 bit Booth multiplier and addition operation. Most of DSP applications uses addition and multiplication unit for faster operation. This arithmetic unit mainly multiplication operation determines the speed of overall design. Here we propose a new recoding scheme named Sum- to modified booth (S-MB) algorithm scheme along with 4:2 compressor which eliminates CSA and CLA adders which are used for partial product addition during multiplication operation. Here we use fused multiply- accumulate (MAC) unit which further reduces the overall area, obtain high throughput than conventional methods.
Authors and Affiliations
Rony Roy Philip, Jilu George
Keywords
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- EP ID EP28410
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