Analysis of Sleep Mode Energy Consumption in CMOS Circuits Using Power Gating Switches

Abstract

Analysis of Sleep Mode Energy Consumption in CMOS Circuits Using Power Gating Switches

Authors and Affiliations

R. Aishwarya , S. P. Valan Arasu

Keywords

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  • EP ID EP98863
  • DOI -
  • Views 117
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How To Cite

R. Aishwarya, S. P. Valan Arasu (2013). Analysis of Sleep Mode Energy Consumption in CMOS Circuits Using Power Gating Switches. International Journal of Advanced Research in Computer Engineering & Technology(IJARCET), 2(6), 1979-1982. https://europub.co.uk/articles/-A-98863