Area and Energy Efficient Viterbi Accelerator for Embedded Processor Datapaths

Abstract

Viterbi algorithm is widely used in communication systems to efficiently decode the convolutional codes. This algorithm is used in many applications including cellular and satellite communication systems. Moreover, Serializer-deserializers (SERDESs) having critical latency constraint also use viterbi algorithm for hardware implementation. We present the integration of a mixed hardware/software viterbi accelerator unit with an embedded processor datapath to enhance the processor performance in terms of execution time and energy efficiency. Later we investigate the performance of viterbi accelerated embedded processor datapath in terms of execution time and energy efficiency. Our evaluation shows that the viterbi accelerated Microblaze soft-core embedded processor datapath is three times more cycle and energy efficient than a datapath lacking a viterbi accelerator unit. This acceleration is achieved at the cost of some area overhead.

Authors and Affiliations

Abdul Rehman Buzdar, Liguo Sun, Muhammad Waqar Azhar, Muhammad Imran Khan, Rao Kashif

Keywords

Related Articles

HIDING AN IMAGE INSIDE ANOTHER IMAGE USING VARIABLE-RATE STEGANOGRAPHY

A new algorithm is presented for hiding a secret image in the least significant bits of a cover image. The images used may be color or grayscale images. The number of bits used for hiding changes according to pixel neigh...

  Hybrid Feature Extraction Technique for Face Recognition

  This paper presents novel technique for recognizing faces. The proposed method uses hybrid feature extraction techniques such as Chi square and entropy are combined together. Feed forward and self-organizing neura...

A Proposed NFC Payment Application

Near Field Communication (NFC) technology is based on a short range radio communication channel which enables users to exchange data between devices. With NFC technology, mobile services establish a contactless transacti...

Framework for Disease Outbreak Notification Systems with an Optimized Federation Layer

Data that is needed to detect outbreaks of known and unknown diseases is often gathered from sources that are scattered in many geographical locations. Often these scattered data exist in a wide variety of formats, struc...

Evaluation and Comparison of Binary Trie base IP Lookup Algorithms with Real Edge Router IP Prefix Dataset

Internet network is comprised of routers that forward packets towards their destinations. IP routing lookup requires computing the Best-Matching Prefix. The main Functionality of Router is finding the Appropriate Path fo...

Download PDF file
  • EP ID EP251089
  • DOI 10.14569/IJACSA.2017.080355
  • Views 63
  • Downloads 0

How To Cite

Abdul Rehman Buzdar, Liguo Sun, Muhammad Waqar Azhar, Muhammad Imran Khan, Rao Kashif (2017). Area and Energy Efficient Viterbi Accelerator for Embedded Processor Datapaths. International Journal of Advanced Computer Science & Applications, 8(3), 402-407. https://europub.co.uk/articles/-A-251089