ASIC IMPLEMENTATION OF HIGH EFFICIENCY 8-BIT ‘OCTALYNX’ RISC MICROPROCESSOR

Abstract

The paper presents structure of 8-bit RISC microcontroller with 16-bit address bus called OctaLynx. The processor behavior is described by Verilog hardware description language and was fabricated as ASIC in CMOS LF 0.15 m (1.8 V) technology. Before fabrication FPGA tests were run. The integrated circuit consists of the core and some peripherals (8-bit general purpose input-output ports, timers/counters, USART, SPI).The controller was designed for tests of the dynamic power management systems.

Authors and Affiliations

Maciej FRANKIEWICZ, Ryszard GAŁ, Adam GOŁDA, Ireneusz BRZOZOWSKI, Andrzej KOS

Keywords

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  • EP ID EP187534
  • DOI -
  • Views 38
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How To Cite

Maciej FRANKIEWICZ, Ryszard GAŁ, Adam GOŁDA, Ireneusz BRZOZOWSKI, Andrzej KOS (2012). ASIC IMPLEMENTATION OF HIGH EFFICIENCY 8-BIT ‘OCTALYNX’ RISC MICROPROCESSOR. Proceedings of Electrotechnical Institute Prace Instytutu Elektrotechniki, 59(260), 241-253. https://europub.co.uk/articles/-A-187534