Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip

Abstract

As technology improves, the power dissipated by the links of a network-on-chip( NoC) starts to compete with the power dissipated by the other elements of the communicate ion subsystem, namely, the routers and the network interfaces (NIs). Here, we present a set of data encoding schemes to reduce the power dissipated by the links of an NoC. In this paper, the encoder in LDPC is replaced with our data encoding schemes in order to reduce the power consumption in Low Density Parity Check Techniques. Experiments carried out on both synthetic and real traffic scenarios show the effectiveness of the proposed schemes. Index Terms: Data encoding, interconnection on chip, low density parity check, majority logic decoding, power analysis.

Authors and Affiliations

Ruchira Ganesh Waghmare, Suhas Sayajirao Jadhav

Keywords

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  • EP ID EP393655
  • DOI 10.9790/9622-0801053538.
  • Views 105
  • Downloads 0

How To Cite

Ruchira Ganesh Waghmare, Suhas Sayajirao Jadhav (2018). Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip. International Journal of engineering Research and Applications, 8(1), 35-38. https://europub.co.uk/articles/-A-393655