Design and Analysis of 12T MTCMOS and Memristor MCAM using VLSI
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2017, Vol 5, Issue 6
Abstract
Memories Are An Integral Part Of Most of the digital devices and hence reducing power consumption of memories as well as area reduction is very important as of today to improve system performance, efficiency and reliability. A transistorized SRAM cell is conventionally used as the memory cell. Large-capacity content addressable memory (CAM) is a key element in a wide variety of applications. The memristor behaves as a switch, much like a transistor. However, unlike the transistor, it is a two-terminal rather than a three-terminal device and does not require power to retain either of its two states. Note that a memristor change its resistance between two values and this is achieved via the movement of mobile ionic charge within an oxide layer, furthermore, these resistive states are non-volatile. This project focuses on new approach towards the design and modeling of memristor based CAM (MCAM) using a combination of MOS devices to form a core of a memory or logic cell that forms the building block of the CAM architecture and 6T SRAM and 12T MTCMOS SRAM cell. The non volatile characteristics and the nano-scaled geometry together with compatibility of the memristor with CMOS processing technology increases the packing density, provides for the new approaches towards power management through disabling CAM blocks without loss of stored data, reduces power dissipation, and has scope for speed improvement as the technology matures. Our proposed work will be, new memory model have been determined and compared with existing models and proposed cell design dissipates less power at different temperatures than existing models. Simulation did on the basis of Microwind 3.1 Back End CMOS Technology to reduce power consumption and enhance data stability.
Authors and Affiliations
Mrs. Sneha S. Oak, Mr. Sagar Badnerkar
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