Design And Analysis Of Low Power 6t Full Adder With Finfet Technology
Journal Title: International Journal of Engineering and Science Invention - Year 2018, Vol 7, Issue 3
Abstract
Full adder is the basic and most common element in the designing of basic arithmetic circuits like Adders, Multipliers, and Dividers etc. It is the heart of Arithmetic and Logic Unit. Any change in the adder cell will degrade the overall performance of the designed circuit, so high care must be taken while designing these adders cells. This paper proposes a new design using FinFETs with 2T XOR gate based 6T full adder. A comparison is also made on the basis of area, power and delay to find out the best possible design technique.
Authors and Affiliations
M. Chandra Sekhar Reddy, Dr. P. Ramana Reddy
Keywords
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