Design and Implementation of 4-bit Pipeline ADC using 0.09µm CMOS Technology
Journal Title: International journal of Emerging Trends in Science and Technology - Year 2014, Vol 1, Issue 3
Abstract
This paper focuses on design and implementation of 1.1V, 4-bit Pipeline Analog to Digital Converter [ADC]. The ADC consists of sample and hold, latched comparator and summing circuit and amplifier of gain 2. The ADC has been designed and simulated in standard gpdk90ηm CMOS technology library using Cadence tool.
Authors and Affiliations
Mr. Vishwanath Lakkannavar
Keywords
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