Design and Implementation Various Logic Circuits Using GDI Technique
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2015, Vol 3, Issue 8
Abstract
Area and power are the 2 very important problems in analog circuit style and synthesis of VLSI circuits that depends on varied vital style parameters. The aim of this paper is to style varied logic gates, Comparator and different basic logic circuits victimization space optimizing techniques like complementary & Gate-Diffusion-input (GDI).Mainly the paper contains Full adder, half subtractor, Comparator and different logic gates. This work evaluates and compares the performance and optimized space of mentioned gates with Static CMOS technique and GDI technique victimization completely different levels in Hspice. The schematics area unit enforced in micro wind and logic operation and verification done in Hspice CMOS technology. At first, victimization Hspice Tool, the circuits area unit enforced with Static CMOS technology so with GDI techniques. Simulations results validate the planned idea and verify that GDI technique decreases the world employed by completely different logic circuits.
Authors and Affiliations
N. Naresh, M. Srinivasulu
Keywords
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- EP ID EP21196
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