Design of High Speed Binary to Gray Code Converter Using A Novel Two Transistor XOR Gate  

Abstract

t—In modern era, Ultra low power design has an Active research topic due to its various Applications. In this paper we introduce a novel low power and Area efficient Binary to Gray code converter is implemented by using two transistor XOR gate. This two Transistor XOR gate is designed by using two PMOS transistors. Both two transistor and Binary to Gray code converter is designed and implemented by using Mentor Graphics Tool. So we were obtained the power dissipation of Binary to Gray code converter which is very small.  

Authors and Affiliations

Pakkiraiah Chakali , T. Krishnamurthy , Adilakshmi Siliveru,

Keywords

Related Articles

OPTIMAL LOCATION OF UPFC IN POWER SYSTEM USING SYSTEM LOSS SENSITIVITY INDEX 

This paper presents the development of simple and efficient models for suitable location of unified power flow controller (UPFC), with static point of view, for congestion management. Two different objectives h...

Model Based Test Case Generation From Natural Language Requirements And Inconsistency, Incompleteness Detection in Natural Language Using Model-Checking Approach

Natural language (NL) is any language that arises in an unpremeditated fashion as the result of the innate facility for language possessed by the human intellect. A natural language is typically used for communication, a...

THERMAL ANALYSIS OF PRINTED CIRCUIT BOARD (PCB) OF AVIONICS EQUIPMENT  

As the power requirements of advanced aircrafts steadily move towards higher density and higher heat loads, Requirements of thermal analysis for advanced avionics are becoming more severe and critical to avionics des...

Signaling Technique for Free Space Optics on the basis of Bit Error Rate 

A new efficient method to implement orthogonal frequency division multiplexing (OFDM) on intensity modulated direct detection (IM/DD) channels is presented and termed auto-correlated optical OFDM. It is shown that...

Selfishness of Discriminate Node in Caching Based Wireless Sensor Network 

The size of wireless sensor node is small and the battery power of these sensor nodes is also limited. The wireless sensor nodes consume battery power in transmitting, processing the data. Generally, Wireless sen...

Download PDF file
  • EP ID EP157028
  • DOI -
  • Views 102
  • Downloads 0

How To Cite

Pakkiraiah Chakali, T. Krishnamurthy, Adilakshmi Siliveru, (2012). Design of High Speed Binary to Gray Code Converter Using A Novel Two Transistor XOR Gate  . International Journal of Advanced Research in Computer Engineering & Technology(IJARCET), 1(6), 231-236. https://europub.co.uk/articles/-A-157028