Enhancing NBTI Recovery in 7T SRAM Cell through Fine-Grained Recovery Boosting

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Enhancing NBTI Recovery in 7T SRAM Cell through Fine-Grained Recovery Boosting

Journal Title: International Journal of Research in Computer and Communication Technology - Year 2012, Vol 1, Issue 6

Abstract

Negative Bias Temperature Instability (NBTI) is becoming a major reliability problem in the semiconductor industry. NBTI Aging of a Static Random Access Memory (SRAM) cell leads to a lower noise margin, thereby increasing the failure rate. When a negative voltage is applied at a p-channel transistor (PMOS) gate, interface traps are formed near oxide layer, causing a change in transistor characteristics. Previously proposed recovery techniques applicable for 6T SRAM cells. In this paper, we applied Recovery Boosting technique to 7T SRAM cell that allows both PMOS devices in the memory cell to be put into the recovery mode by slightly modifying to the design of conventional 7T SRAM cell. The simulation results are taken for 0.25um technology with the help of Tanner Tools v13.0.In this paper we show that recovery boosting provides 60% improvement in the static noise margin. And write power decreased by 98% compared to 6T SRAM and 7T SRAM cells and 13% in delay while having 54% impact on area comparing 7T SRAM cell and 7T Rb SRAM cell.

Authors and Affiliations

S. Sasi Kiran, U Ravi Kanth, D Mahesh Varma

Keywords

EP ID EP27489
DOI -
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