Fast Base-10 Multiplication Using XS-3 and ODDS BCD codes

Abstract

We present the algorithm and architecture of a BCD parallel multiplier that exploits some properties of two different redundant BCD codes to speed up its computation: the redundant BCD excess-3 code (XS-3), and the overloaded BCD representation (ODDS). In addition, new techniques are developed to reduce significantly the latency and area of previous representative high performance implementations. Partial products are generated in parallel using a signed-digit base-10 recoding of the BCD multiplier with the digit set [-5,5], and a set of positive multiplicand multiples (0X, 1X, 2X, 3X, 4X, 5X) coded in XS-3.

Authors and Affiliations

Ch. Balaram BMurthy, A. Srinivas, T. Ragini, J. Umesh

Keywords

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  • EP ID EP20589
  • DOI -
  • Views 281
  • Downloads 5

How To Cite

Ch. Balaram BMurthy, A. Srinivas, T. Ragini, J. Umesh (2015). Fast Base-10 Multiplication Using XS-3 and ODDS BCD codes. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 3(5), -. https://europub.co.uk/articles/-A-20589