High Performance Weighted Random BIST
Journal Title: International Journal of engineering Research and Applications - Year 2018, Vol 8, Issue 4
Abstract
A New Low-Transition (LT) Built-In Self-Test (BIST) Technique Is Proposed Based On Weighted PseudoRandom Test Pattern Generation Tested In Circuit Under Test (CUT). A New BIST Method Has Been Proposed Using Weighted Random Test Pattern Generation. The New Method Consists Of Two Separate Phases: 1) Low Transition Pattern Generation And 2) Weighted Random Test Pattern Generation Using Weights Pattern. This Proposed Circuit Achieve High Speed And Low Area And Delay. The Experimental Shows Good Result Using XILINX XC3S100E-5TQ144 Spartan FPGA Device.
Authors and Affiliations
Ms. Anuradha . B, Nandhini . M, Nivethithaa C. M, Pallavi Lawani . B, Priya . N
Keywords
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