IMPACT OF SOFT-ERROR IN ROBUST CONFIGURABLE SYSTEM DESIGN USING REAL TIME OPERATING SYSTEM
Journal Title: International Journal of Computer Science and Management Studies (IJCSMS) www.ijcsms.com - Year 2012, Vol 12, Issue 1
Abstract
This paper investigates the sensitivity of real-time systems running applications under operating systems that are subject to soft-errors. A procedure for characterizing the soft error susceptibility of nodes in a logic circuit, and a heuristic procedure for selecting the set of nodes for partial duplication are described. Third, the correctness of embedded systems is currently jeopardized by soft errors that may render control systems inoperable. In general, soft errors are increasingly a problem due to smaller fabrication sizes and deployment in harsh environments. A full set of experimental results demonstrate the cost-effective tradeoffs that can be achieved. First, architects must understand the impact of soft errors on their designs. Second, they must select judiciously from among available techniques to reduce this impact in order to meet their reliability targets with minimum overhead Two reduction heuristics, cluster sharing reduction and dominant value reduction, are used to reduce the soft error failure rate significantly with a fraction of the overhead required for conventional TMR. However, FPGA’s vulnerability to hard and soft errors is a major weakness to robust configurable system design. To eliminate the soft memory errors that are induced by cosmic rays, memory manufacturers must either produce designs that can resist cosmic ray effects or else invent mechanisms to detect and correct the errors.
Authors and Affiliations
M. Shankar , Dr. M. Sridar , Dr. M. Rajani
Keywords
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