Modeling Of Combinational Circuits Based On Ternary Multiplexer Using VHDL
Journal Title: International Journal on Computer Science and Engineering - Year 2010, Vol 2, Issue 5
Abstract
This paper presents a novel method for defining, analyzing, testing and implementing the basic combinational circuitry with VHDL Simulator. This paper shows the potential of VHDL modeling and simulation that can be applied to Ternary witching circuits to verify its functionality and timing specifications. A novel method is brought out for implementing the basic combinational circuitry with minimum number of multiplexers. It also includes 1-bit and 2-bit position shifter and Barrel shifter. Method of coding is illustrated with respect to block diagram. An intention is to show how proposed simulator can be used to simulate MVL circuits and to evaluate system performance.
Authors and Affiliations
A. Sathish kumar , A. Swetha Priya
Keywords
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- EP ID EP102724
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