Multilevel Power Estimation Of Benchmark Circuit Using Neural Algorithm
Journal Title: International Journal of Electronics Communication and Computer Technology - Year 2014, Vol 4, Issue 3
Abstract
Dissipation of power has emerged as one of the very important design constraints as the complexity of VLSI circuits has been increased. Now low power designs are generally preferred in various applications. In order to estimate the power consumption of the entire design correctly, an accurate memory power model is needed. In earlier days power estimation was made at the higher levels of design flow. Lookup table was the approach for power modeling, but lookup tables may become infeasible for large circuits because the table size would increase exponentially to meet the accuracy requirement. Multilevel power estimation is done at different levels of abstraction including the Register Transfer Level (RTL), the gate and the transistor level. These levels give the detailed information of the circuit. For complex digital circuits, building their power models is a popular approach to estimate their power consumption. The work introduces the power modeling approach using neural networks to learn the relationship between power dissipation and input/output characteristic vector during simulation. The neural power models have high accuracy because they can automatically consider the non-linear power distributions. More importantly our neural power model is very simple and straightforward and it does not require any transistor-level or gate-level description of the circuits
Authors and Affiliations
Sarita Chauhan| Head, Department of ECE M.L.V.T.E.C. Bhilwara Bhilwara (Rajasthan), India, Bhavesh Prajapat| Student, Department of ECE M.L.V.T.E.C. Bhilwara Bhilwara (Rajasthan),India
Keywords
Related Articles
- EP ID EP8406
- DOI -
- Views 340
- Downloads 19
Emotion Detection Using EEG Signal Analysis
This paper focus on various techniques for emotion extraction and emotion classification methods using EEG analysis, and various database for EEG are summarized. In the feature extraction techniques, discrete wavelet...
Way-Tagged L2 Cache Architecture in Conjunction with Energy Efficient Datum Storage
For improving the performance constraint in various microprocessors write-through cache policy can be employed. However, write-through policy also incurs large energy overhead. Considering the energy factor way-tagged ca...
Construction of Rectangular Window Linear Time Verient Filter for Noise Concellation Using FRFT
The Direct sequence spread spectrum concepts are important for achieving better performance of communication systems. The suppression of interference noise present in the spread spectrum communication systems is essentia...
License Plate Recognition System based on Image Processing Using Labview
A License plate recognition (LPR) system is one kind of an intelligent transport system and is of considerable interest because of its potential applications in highway electronic toll collection and traffic monitoring s...
FPGA Based Implementation of Genetic Algorithm Using VHDL
The research on genetic algorithm is normally concentrate on software Implementation, which is always restricted in term of high real time by computer system because it is serial calculation. This paper introduces a hard...