Implementation of Multimode Interleaver Address Generator for Wireless Application
Journal Title: International Journal of Engineering Sciences & Research Technology - Year 30, Vol 3, Issue 4
Abstract
In this brief the Low-complexity and novel technique is developed to implement efficiently the address generation circuitry of the interleaver used in the WiMAX and WLAN transreceiver. Wireless communication is one of the most vibrant research areas in the communication field. WLAN and WiMAX are emerging standards for wireless broadband communication system. The OFDM multiplexing technique used in above standards for reducing the inter symbol interference over wireless channel. The various modulation schemes such as Binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), 16-quadrature amplitude modulation (QAM) and 64-QAM can be used to generate the address in interleaver structure. The channel interleaver employed in the communication system for minimizing the effect of burst error and improving the performance of FEC codes in wireless channel. The complex mathematical formulas can be replaced with optimized hardware structures. The modified structure to be used for both applications. Due to this compact structure the circuit complexity and area can be reduced. The structure can be implemented in FPGA using VHDL coding.
Authors and Affiliations
T. Shanthi
Keywords
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