MULTI-KEY IMPLEMENTATION OF AES ALGORITHM IN VERILOG

Abstract

 Increasing need of high security in communication led to the development of several cryptographic algorithms hence sending data securely over a transmission link is critically important in many applications. NIST in the beginning selected Rijndael within October 2000 and formal adoption as being the AES standard started in December 2001. FIPS PUB 197 explains a 128-bit block cipher making a use of a 128, 192, or 256-bit key. This paper presents the Rijndael algorithm ([3] and [4]), a symmetric block cipher that can process data blocks of 128 bits, using cipher keys with lengths of 128, 192, and 256 bits & each program simulation results are verified with ModelSim PE and are synthesized in Xilinx ISE 14.3 Project Navigator.

Authors and Affiliations

K. Reddy Rani*

Keywords

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  • EP ID EP100828
  • DOI -
  • Views 118
  • Downloads 0

How To Cite

K. Reddy Rani* (0).  MULTI-KEY IMPLEMENTATION OF AES ALGORITHM IN VERILOG. International Journal of Engineering Sciences & Research Technology, 4(9), 127-136. https://europub.co.uk/articles/-A-100828