Optimized Multiple Word Radix-2 Montgomery Multiplication Algorithm
Journal Title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY - Year 2013, Vol 4, Issue 7
Abstract
Montgomery multiplication algorithm is used in the implementation of RSA and other cryptosystems based on modular arithmetic. Several improvements have been suggested to increase its suitability for hardware implementation. Radix-2 Montgomery architectures are easier to implement in hardware. In this paper a modified optimized algorithm for radix-2 Montgomery Multiplication is presented which is based on parallelizing the multiplications within each Processing Element and pre-computation of partial results using assumptions regarding the most significant bit of the previous design thereby improving speed. The design has been modeled using VHDL. The VHDL code has been synthesized and simulated using Xilinx ISE 10.1.
Authors and Affiliations
Harmeet Kaur1 , Charu Madhu
High Density Concrete Using Fly Ash, Micro Silica and Recycled Aggregate – An Experimental Study
Concrete is the most important engineering material and the addition or replacement of some of the materials may change the properties of the concrete. In recent years a lot of research work has been carried out in order...
Behavior of Clayey Soil Stabilized with Rice Husk Ash & Lime
In India the soil mostly present is Clay, in which the construction of sub grade is problematic. In recent times the demands for sub grade materials has increased due to increased constructional activities in the road se...
Speed-up Extension to Hadoop System
For storage and analysis of online or streaming data which is too big in size most organization are moving toward using Apaches Hadoop- HDFS. Applications like log processors, search engines etc. using Hadoop Map Reduce...
Design of FPGA Based Encryption Algorithm using KECCAK Hashing Functions
Security makes the people to stay in the sense of vital modern technological improvements, especially focused in Cryptography process. We have to consider the high level of security, the speed of encryption and the...
Design and Simulation of Single-Phase Three-Level, Four-Level and Five-Level Inverter Fed Asynchronous Motor Drive with Diode Clamped Topology
This paper deals with study of single-phase three-level, four-level and five-level inverter fed asynchronous motor drive. Both three-level, four-level and five-level inverters are realized by diode clamped inverter topol...