Sampling Rate Impact on the Tuning of PID Controller Parameters
Journal Title: International Journal of Electronics and Telecommunications - Year 2016, Vol 62, Issue 1
Abstract
The paper deals with an analysis of automatic control system with continuous and discrete PID controllers. A method of tuning the parameters of the continuous controller is presented, which is optimal according to the ITAE criterion. The behavior of control systems with discrete controllers whose parameters were tuned using the mentioned method are described. The impact of changes in the sampling period of controlled signal on the control quality is shown. Changes of the values of optimal parameters of discrete PID controllers in relation to changes of the sampling rate of controlled signal are characterized.
Authors and Affiliations
Michal Laskawski, Miroslaw Wcislik
Time interval measurement module implemented in SoC FPGA device
We presents the design and test results of a picosecond-precision time interval measurement module, integrated as a System-on-Chip in an FPGA device. Implementing a complete measurement instrument of a high precision in...
The Idea of Enhancing Directional Energy Radiation by a Phased Antenna Array in UHF RFID System
The interrogation zone IZ is the most important parameter when RFID systems are considered. Its predictability is determined by the construction and parameters of antenna built in a read/write device. The IZ should be of...
Method for Filling and Sharpening False Colour Layers of Dual Energy X-ray Images
An X-ray scanning and image processing have a vast range of applications in the security. An image of a content of some package being passed for example to an airplane or to the court house may help to figure out if the...
Practical Aspects of Physical and MAC Layer Security in Visible Light Communication Systems
Visible light communication (VLC) has been recently proposed as an alternative standard to radio-based wireless networks. Originally developed as a physical media for PANs (Personal area Networks) it evolved into univers...
Low-Power High-Speed Double Gate 1-bit Full Adder Cell
In this paper, we proposed an efficient full adder circuit using 16 transistors. The proposed high-speed adder circuit is able to operate at very low voltage and maintain the proper output voltage swing and also balance...