A Comparative Performance Analysis of Various CMOS Design Techniques for XOR and XNOR Circuits Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Aditi Joshi , Chanchal Jain , Pooja Choudhary, Chirag Arora, Krishan Rapswal Subject(s): Engineering, Applied Linguistics
Performance Evaluation of 1-Bit Full Adder using Hybridizing PTL and GDI Techniques Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
Low Power Mix Logic Design Using Line Decoder: A Review Journal title: International Journal of Trend in Scientific Research and Development Authors: Subject(s): Biological Sciences, Computer and Information Science, Engineering, Mathematics, Agricultural Engineering, Management, Engineering, Multidisciplinary
PERFORMANCE ANALYSIS OF ADIABATIC TECHNIQUES USING FULL ADDER FOR EFFICIENT POWER DISSIPATION Journal title: ICTACT Journal on Microelectronics Authors: Venkatesh C, Mohanapriya A, Sudha Anandhi R Subject(s):
DESIGN AND IMPLEMENTATION OF THE COMBINATIONAL CIRCUITS USING LOW POWER ADIABATIC LOGIC TECHNIQUES Journal title: Engineering and Technology Journal Authors: Dr. A. Gangadhar  Subject(s): Engineering, Technology
