Performance Analysis Of Vedic Multiplier Using Reversible Logic In Spartan 6 Journal title: International Journal of Research in Computer and Communication Technology Authors: T Nagaveer, M Neelima, VNM Brahmanandam Subject(s): Computer and Information Science, Telecommunications
Design of High Speed Low Power Multiplier Using Nikhilam Sutra with Help of Reversible Logic Journal title: International Journal of Modern Engineering Research (IJMER) Authors: Manjeet Sankhwar Subject(s):
