12-BIT CMOS DIGITALLY CONTROLLED OSCILLATORS FOR ADPLL

Abstract

This paper presented a new design of CMOS digitally controlled oscillators (DCO) for low power application. The CMOS DCO designed based on a ring oscillator. New design has been implemented driving strength controlled delay cell and with two NAND gates used as inverters. This circuit has been simulated in spice with 0.5 μm (micrometer) technology at supply voltage of 5 V. New design DCO shows 41-44% power saving as compared to conventional DCO. The frequency range of new design DCO varies from [1.5543 – 1.6173] GHz with the variation in control word from ‘000000’ to ‘000001'. Power consumption of new DCO varies from [2.4601 – 2.6719] mW.

Authors and Affiliations

Satish Kumar , Sumit Sangwan , Dr. R. K. Khola

Keywords

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  • EP ID EP86978
  • DOI -
  • Views 201
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How To Cite

Satish Kumar, Sumit Sangwan, Dr. R. K. Khola (2012). 12-BIT CMOS DIGITALLY CONTROLLED OSCILLATORS FOR ADPLL. International Journal of Electrical, Electronics and Mechanical Fundamentals (www.ijeemf.com), 2(1), 33-37. https://europub.co.uk/articles/-A-86978