Design of Viterbi Decoder for Speech to Text Conversion Application using ACS Architecture
Journal Title: IOSR journal of VLSI and Signal Processing - Year 2019, Vol 9, Issue 1
Abstract
The Viterbi algorithm is generally used in decoding convolutional codes utilized in communications. In this paper Viterbi decoder and convolution encoder is designed, used in speech to text conversion.We can utilize three variations for re-computing with operands and itsalterations. The modified full adder circuit is subjected to low power consumption and low area. This can be implemented in Application Specific Integrated circuit (ASIC). This paper explains reduction of power and area by utilization ofmodified full adder. In this,viterbi decoder is designed by utilizing the modified full adder. viterbi decoder and convolution encoder are implemented in speech to text conversion application.
Authors and Affiliations
Dr. S Aruna, Mr. A v Adiseshu, Dr. K. Srinivasa Naik
Keywords
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- EP ID EP443058
- DOI 10.9790/4200-0901010613.
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