Digitally Programmable Floating Impedance Multiplier using DVCC

Abstract

A novel digitally programmable floating impedance multiplier is presented. It is realized using differential voltage current conveyor and a digital control module. Digitally programmable floating impedance multipliers can provide digital control to floating impedance functions such as, resistor, capacitor, inductor without quantizing the signal. The technique used is simple, versatile as well as compatible for microminiaturization in contemporary IC technologies. The simulation results on digitally programmable floating impedance multiplier verify the theory.

Authors and Affiliations

N. Afzal| Department of Electronics and Communication Engineering, Jamia Millia Islamia, New Delhi, India, Iqbal A. Khan| Department of Electrical Engineering, Faculty of Engineering & Islamic Architecture, Umm Al Qura University, Makka Al Mukarrama, Saudia Arabia

Keywords

Related Articles

TRANSMISSION OF DATA USING POWER LINE CARRIER COMMUNICATION SYSTEM

This paper serves as a general and technical reference to transmission of data using a power line carrier communication system which is a preferred choice over Wireless or other Home Networking technologies due to the ea...

Study and Performance Analysis of a General MIMO-OFDM System for Next Generation Communication Systems

OFDM may be combined with multiple antennas at both the access point and mobile terminal to increase diversity gain and/or enhance system capacity on a time-varying multipath fading channel, resulting in a multiple-input...

Achieving MANETs Security by Exchanging Path Oriented Keys and Priority Based Secured Route Discovery

In this work, two scenarios are considered, scenario-1 is key based communication and scenario-2 is priority based routing and communication. In scenario-1, MANET works on generated keys called KEY1 and KEY2 to estab...

Advance Technique in Demodulation of Non-Coherent Binary Phase Shift Keying

Demodulation of Non Coherent Binary Phase Shift Keying, by using STEL -2110A Chip Circuitry VDSP++4.5 software Technique, Both Time and Frequency recovery of the signal is possible, but in this paper only timing recovery...

A Proficient Low Power Logarithmic Multiplier Using Iterative Pipeline Technique

Multiplication is the basic function performed in digital signal processors (DSP) and multimedia processors. Applications in DSP heavily rely on multiplication with high performance as a prime target but the major re...

Download PDF file
  • EP ID EP8336
  • DOI -
  • Views 395
  • Downloads 27

How To Cite

N. Afzal, Iqbal A. Khan (2013). Digitally Programmable Floating Impedance Multiplier using DVCC. International Journal of Electronics Communication and Computer Technology, 3(1), 358-361. https://europub.co.uk/articles/-A-8336