Hardware Strategies for Image Processing in an FPGA Based Microarray Image Processing SoC

Abstract

The present paper describes a System on a Chip for microarray image processing together with the steps of a microarray experiment integrated in the proposed system. The system’s reduced size and the hardware algorithms proved to overcome the disadvantages of the existing software for microarray image processing. FPGA technology was chosen for the implementation due to its parallel computation capabilities and to the ease of reconfiguration. Hardware strategies for implementing image processing techniques are presented, together with a hardware implementation for edge detection of microarray spots using distributed memory and spatial computation.

Authors and Affiliations

Bogdan BELEAN, Monica BORDA, Albert FAZAKAS

Keywords

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  • EP ID EP91598
  • DOI -
  • Views 132
  • Downloads 0

How To Cite

Bogdan BELEAN, Monica BORDA, Albert FAZAKAS (2009). Hardware Strategies for Image Processing in an FPGA Based Microarray Image Processing SoC. Acta Technica Napocensis- Electronica-Telecomunicatii (Electronics and Telecommunications), 50(2), 1-4. https://europub.co.uk/articles/-A-91598