Implementation of Different Low Power Multipliers Using Verilog Journal title: The International Journal of Technological Exploration and Learning Authors: Koteswara Rao Ponnuru| M. Tech, Assistant Professor SRK Institute of Technology Vijayawada, A.P., In... Subject(s): Engineering, Educational Technology
Power Optimization for a Datapath of A Genral Purpose Processor Journal title: International Journal of Research in Computer and Communication Technology Authors: Srinivasa Naidu Nalla, Kalpana Telkar Subject(s): Computer and Information Science, Telecommunications
VLSI Implementation of High Speed & Low Power Multiplier in FPGA Journal title: IOSR Journals (IOSR Journal of Computer Engineering) Authors: Prashant Kumar Sahu Subject(s):
Low Power Variable Latency Multiplier With AH Logic Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
