Design of Modulo 2n-1 based on Radix-8 Algorithm for RNS & MAC Applications Journal title: International Journal of Research in Computer and Communication Technology Authors: Neredimelli V V P Hide, Dr. I. Santi Prabha Subject(s): Computer and Information Science, Telecommunications
Design and Implementation of FPGA Radix-4 Booth Multiplication Algorithm Journal title: International Journal of Research in Computer and Communication Technology Authors: A.Rama Vasantha, M.Sai Satya Sri Subject(s): Computer and Information Science, Telecommunications
32 Bit Parallel Multiplier Using VHDL Journal title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY Authors: Vrushali Gaikwad , Rajeshree Brahmankar , Amiruna Warambhe , Yugandhara Kute , Nishant Pandey Subject(s):
Design of 32 Bit Vedic Multiplier using Carry Look Ahead Adder Journal title: GRD Journal for Engineering Authors: Divya. P, Surya. K, Uma Narayani. R, Vidhiya. B, Sathya. G Subject(s):
High Speed Low Power Radix-4 Modified Booth Novel Carry Select Adder Based Multiplier and Multiply Accumulate (MAC) Unit Journal title: Scholars Journal of Engineering and Technology Authors: Mala Sinnoor Subject(s):
