An Enhanced Algorithm for Floorplan Design Using Hybrid Ant Colony and Particle Swarm Optimization Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Prabhjit Kaur Subject(s): Engineering, Applied Linguistics
A Review on Thermal Aware Optimization of Three Dimensional Integrated Circuits (3D ICs) Journal title: International Journal of Modern Engineering Research (IJMER) Authors: Sakshi Raghuvanshi , Prince Nagar , G.K.Singh Subject(s):
A Genetic Approach for Area Reduction in VLSI Layout Journal title: International Journal of Engineering Sciences & Research Technology Authors: J.Allwyn Vinoth* Subject(s):
SIMULATED ANNEALING ALGORITHM FOR MODERN VLSI FLOORPLANNING PROBLEM Journal title: ICTACT Journal on Microelectronics Authors: Jenifer J, Anand S, Levingstan Y Subject(s):
Free Area Estimator for Simulated Annealing of VLSI Floor Plans Journal title: International Journal of Innovative Research in Computer Science and Technology Authors: Ashwini Baligatti, Ashwini Desai, Dr. Uday Wali Subject(s): Electrical and Electronic Engineering, Chemical Engineering, Civil Engineering, Computer Science, Artificial Intelligence, Computer Science, Information Systems, Computer Science, Interdisciplinary Applications, Engineering, Multidisciplinary, Engineering, Civil, Computer Science, Cybernetics, Computer Science, Theory & Methods, Computer Science, Software Engineering
Chip Floorplanning Optimization Using Deep Reinforcement Learning Journal title: International Journal of Innovative Research in Computer Science and Technology Authors: Shikai Wang, Haodong Zhang, Shiji Zhou, Jun Sun, Qi Shen Subject(s): Electrical and Electronic Engineering, Chemical Engineering, Civil Engineering, Computer Science, Artificial Intelligence, Computer Science, Information Systems, Computer Science, Interdisciplinary Applications, Engineering, Multidisciplinary, Engineering, Civil, Computer Science, Cybernetics, Computer Science, Theory & Methods, Computer Science, Software Engineering