Power Analysis of Sequential Circuits Using MultiBit Flip Flops Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Yarramsetti Ramya Lakshmi, Dr. I Santi Prabha, R Niranjan Subject(s): Engineering, Applied Linguistics
Advanced Low Power CMOS Design to Reduce Power Consumption in CMOS Circuit for VLSI Design Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Pramoda N V Subject(s): Engineering, Applied Linguistics
Reduced Power In Processor Cache Using New Cache Architecture Journal title: International Journal of Research in Computer and Communication Technology Authors: V.Muthu Revathy, A. Nandini, V.P.M.B. Aarthi, S. Ellammal Subject(s): Computer and Information Science, Telecommunications
Clock Power Reduction Using Merged Flip Flops Technique Journal title: International Journal of Engineering Sciences & Research Technology Authors: S.Murugan Subject(s):
OFDM-PAPR Reduction using Statistical Clipping and Window based Noise Filtering Journal title: International Journal of Computational Engineering and Management IJCEM Authors: Aman Sehgal and Amit Kumar Kohli Subject(s):
Strategizing Power Utilization within Intelligent Tags Journal title: International Journal of P2P Network Trends and Technology(IJPTT) Authors: Dr. JKR Sastry , Dr. A. Vinya Babu Subject(s):
A Survey about Power Reduction in Intergated Circuits Using Multi-Bit Flip-Flops Journal title: International Journal of Engineering Sciences & Research Technology Authors: R.Rajakumari Subject(s):
