Comparison and performance analysis of VLSI adders using 22nm Technology Journal title: International Journal of Research in Computer and Communication Technology Authors: Namachivayam S, Rajendiran P, M.E. Subject(s): Computer and Information Science, Telecommunications
Design and analysis of 16-bit Full Adder using Spartan-3 FPGA Journal title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) Authors: B.N.Srinivasa rao , R. Prasada rao Subject(s):
Low-Power High-Speed Double Gate 1-bit Full Adder Cell Journal title: International Journal of Electronics and Telecommunications Authors: Raushan Kumar, Sahadev Roy, Chandan Tilak Bhunia Subject(s):
