Design of Adjustable Ethernet Serial Server Based on ARM+FPGA

Journal Title: 河南科技大学学报(自然科学版) - Year 2018, Vol 39, Issue 6

Abstract

For the problems that the number of Ethernet serial device server's serial ports was fixed and was not be increased or decreased in real time, the Ethernet serial device server based on advanced risc machines ( ARM) and field programmable gate array ( FPGA) was designed. The ARM + FPGA framework was adopted for Ethernet serial device server and ARM + LAN8720 chip was used as hardware platform. Ethernet communication was realized on μC/OS-II operating system. FPGA + interface chip was used as the hardware platform of serial ports, and serial port module was constructed based on FPGA to realize serial port communication. Increasing or decreasing the number of serial ports was realized by the multi-task management of the operating system, the operation of flexible static memory controller ( FSMC) mapping register address and the function of multi serial port management of FPGA. The maximum number of the serial ports of this system were achieved by analyzing the dynamic resource allocation algorithm during the operation of incresing or decresing the number of serial ports. The experimental results show that the ethernet serial device server realizes multi serial port communication. The serial number is increased and decreased optionally. The maximum baud rate is up to 115 200 bit/s, and the maximum number of serial ports is up to 35.

Authors and Affiliations

Qiaoyu XU, Xinwen ZHOU, Junwei WANG, Pei ZHU

Keywords

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  • EP ID EP468515
  • DOI -
  • Views 63
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How To Cite

Qiaoyu XU, Xinwen ZHOU, Junwei WANG, Pei ZHU (2018). Design of Adjustable Ethernet Serial Server Based on ARM+FPGA. 河南科技大学学报(自然科学版), 39(6), -. https://europub.co.uk/articles/-A-468515