HIGH SPEED ONLINE FAULT DETECTION OF 64-BIT RIPPLE CARRY ADDER USING MODIFIED MODULAR REDUNDANCY
Journal Title: ICTACT Journal on Microelectronics - Year 2015, Vol 1, Issue 3
Abstract
Developments in VLSI technology has increased density of chips so that, processing elements are capable of doing complex computations. The increase in complexity and density of the VLSI chip has made electronic systems more susceptible to defects. Therefore, testing and fault tolerance techniques are required to guarantee reliable operations of systems. Online fault detection techniques are active during normal operations. This paper proposes a novel online fault detection technique for 64-bit Ripple Carry Adder based on type of input data. A technique is developed to detect the single stuck-at faults that occur in the Ripple Carry Adder by using two rail checker. The design was modeled using Verilog HDL and simulated and synthesized in Xilinx ISE 14.5. A comparison is made by implementing the design in different FPGA devices. The results show that the proposed design has better device utilization and less delay in Virtex 5 FPGA. The proposed technique has only 16.2% delay overhead compared to simple Ripple Carry Adder without fault detection.
Authors and Affiliations
Jisha M. Nair, Pradeep C
Keywords
Related Articles
- EP ID EP198065
- DOI 10.21917/ijme.2015.0019
- Views 136
- Downloads 0
DESIGN AND SIMULATION OF CURRENT FEEDBACK OPERATIONAL AMPLIFIER IN 180nm AND 90nm CMOS PROCESSES
This paper proposes a Current Feedback Operational Transconductance Amplifier (CFB OTA) with a folded cascode op-amp as input stage cascaded with class AB buffer as output stage. This gives better results on parameters s...
VLSI IMPLEMENTATION OF HIGH SPEED AREA EFFICIENT ARITHMETIC UNIT USING VEDIC MATHEMATICS
High speed Arithmetic Units (AUs) are widely used in architectures used in signal and image processing applications. AUs involve multi-functions and have multiplier as the critical element. In this paper, we present desi...
VDTA BASED GROUNDED TO FLOATING ADMITTANCE ELECTRONICALLY CONVERTER
The Field Programmable Gate Array (FPGA) devices are quickly replacing the microcontrollers for embedded applications since they offer both the performance of hardware and flexibility of software In this article, a new g...
SIMULATED ANNEALING ALGORITHM FOR MODERN VLSI FLOORPLANNING PROBLEM
In floorplanning, our aim is to determine the relative locations of the blocks in the chip and the objective is to minimize the floorplan area, wirelength. Generally, there are so many strategies in VLSI floorplanning li...
DESIGN AND ANALYSIS OF MICROSTRIP PATCH ARRAY ANTENNA FOR WLAN APPLICATIONS
In this paper, a rectangular slotted microstrip patch array antenna is proposed and designed for wireless local area network applications. A single patch, 1x2, 1x4 and 1x8 patch array antenna is designed and the impacts...