Way-Tagged L2 Cache Architecture in Conjunction with Energy Efficient Datum Storage

Abstract

For improving the performance constraint in various microprocessors write-through cache policy can be employed. However, write-through policy also incurs large energy overhead. Considering the energy factor way-tagged cache architecture is proposed here to improve the energy efficiency of write-through caches. Finally the means of data storage if considered deeply may lead to reduction in energy consumption to a greater factor. Thus it not only calls up for energy consumption reduction but also implements overall performance improvement as well.

Authors and Affiliations

Vineeta Vasudevan Nair| ECE Department, ANNA University Chennai Sri Eshwar College Of Engineering Coimbatore, India

Keywords

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  • EP ID EP8380
  • DOI -
  • Views 484
  • Downloads 26

How To Cite

Vineeta Vasudevan Nair (2014). Way-Tagged L2 Cache Architecture in Conjunction with Energy Efficient Datum Storage. International Journal of Electronics Communication and Computer Technology, 4(1), 543-548. https://europub.co.uk/articles/-A-8380