Memory Design Using Logical Gates Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Mandisha Sharma , Mansi Kakkar, Manish Sharma Subject(s): Engineering, Applied Linguistics
Design Techniques For Low Power Implicit Pulse Triggered Circuits Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Smt.A. Rajani, A. Yamini Subject(s): Engineering, Applied Linguistics
Low Power Adiabatic Complementary Pass Transistor Logic for Sequential Circuit Journal title: International Journal of Research in Computer and Communication Technology Authors: MAMTA NARENDRA KUMARI, Minal Keote, Navneet Aman Subject(s): Computer and Information Science, Telecommunications
An Fpga Implementation Of N/N+1 Prescaler For A Low Power Single Phase Clock Distribution System Journal title: International Journal of Research in Computer and Communication Technology Authors: V Satya Deepthi, Sneha Suprakash, USBK MahaLakshmi Subject(s): Computer and Information Science, Telecommunications
OPTIMIZATION OF POWER USING CLOCK GATING Journal title: GRD Journal for Engineering Authors: D. Nirosha, T. Thangam Subject(s):
