Implementation of Different Low Power Multipliers Using Verilog Journal title: The International Journal of Technological Exploration and Learning Authors: Koteswara Rao Ponnuru| M. Tech, Assistant Professor SRK Institute of Technology Vijayawada, A.P., In... Subject(s): Engineering, Educational Technology
Efficient Multiplier Design for DWT through Lifting Scheme Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Ms. Dhrisya, Mr. V Lakshmipathi Subject(s): Engineering, Applied Linguistics
Approximate Low power, high-performance Adder and Multiplier Design using Error Tolerance Application Journal title: International Journal of Engineering Research and Advanced Technology Authors: Subject(s):
Design and Analysis of Hybrid Tree Multipliers for Reduction of Partial Products Journal title: Mehran University Research Journal of Engineering and Technology Authors: S. Bibi, M. Obaidullah, M.A. Shami Subject(s):
FPGA Implementation of Wallace Tree Multiplier using CSLA / CLA Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
Timing Analysis of Generic Multipliers Journal title: IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) Authors: Anju Rajput Subject(s):
