A High Speed 16*16 Multiplier Based On Urdhva Tiryakbhyam Sutra Journal title: International Journal of Science Engineering and Advance Technology Authors: B.Ratna Raju| Kakinada Institute Of Engineering & Technology ratnaraju.ece@kietgroup.com, D.V.Satish... Subject(s): Engineering, Medicine, Social Sciences, Pharmacy
PEB Based DWT with an Efficient Fixed Booth Multiplier Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Surya. P. P, Navin. Y Subject(s): Engineering, Applied Linguistics
Design of Parallel MAC Based On Radix-4 & Radix-8 Modified Booth Algorithm Journal title: International Journal of Research in Computer and Communication Technology Authors: S. Anitha, M. Vidya, D. Mahesh Varma Subject(s): Computer and Information Science, Telecommunications
An Optimized MAC Unit Using S-MB Recoding Scheme and Compressors Journal title: International Journal of Research in Computer and Communication Technology Authors: Rony Roy Philip, Jilu George Subject(s): Computer and Information Science, Telecommunications
Design of Modified Booth Multiplier using Reversible gate logic for Radix-8 Journal title: International Journal of Engineering Sciences & Research Technology Authors: Baljinder Kaur Subject(s):
OPTIMIZATION OF LOW POWER USING FIR FILTER Journal title: International Journal on Computer Science and Engineering Authors: S. Prem Kumar , S. Sivaprakasam , G. Damodharan , V. Ellappan Subject(s):
Low Power High Speed Two’s Complement Multiplier Journal title: International Journal of P2P Network Trends and Technology(IJPTT) Authors: P.Arulbalaji#1 , Mrs. K.Vanitha Subject(s):
Design & implementation of FPGA based digital filters Journal title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) Authors: Ankit Jairat , , Sunil Kumar Shah , ,Amit jain Subject(s):
High Speed and Reduced Power – Radix-2 Booth Multiplier Journal title: International Journal of Computational Engineering and Management IJCEM Authors: Sakshi Rajput, Priya Sharma, Gitanjali, Garima Subject(s):
Low Power Multiplier by Effective Capacitance Reduction Journal title: American Journal of Engineering and Applied Sciences Authors: Nageshwar Reddy Peddamgari, Damu Radhakrishnan Subject(s):
Implementation of an Arithmetic Logic Unit using Area Efficient Carry Look-Ahead Adder and Booth Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
VLSI Implementation for BIST Controller using Signed and Unsigned Multiplier Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
High Speed Low Power Radix-4 Modified Booth Novel Carry Select Adder Based Multiplier and Multiply Accumulate (MAC) Unit Journal title: Scholars Journal of Engineering and Technology Authors: Mala Sinnoor Subject(s):
A Review of Different Methods for Booth Multiplier Journal title: International Journal of engineering Research and Applications Authors: Jyoti Kalia, Vikas Mittal Subject(s):
Design And Analysis of Booth Multiplier Using FPGA Journal title: International Journal of engineering Research and Applications Authors: N.V.N.Prasanna Kumar Subject(s):
