16nm planar process CMOS SRAM cell design: Analysis of Operating Voltage and Temperature Effect Journal title: International Journal of Electronics Communication and Computer Technology Authors: Rohit Sharma| Reseach Scholar ECE Department, MMMEC, Gorakhpur, UP, India, R.K. Chauhan| Associate P... Subject(s): Computer and Information Science, Engineering
Design of Power Efficient and High Speed Carry Select Look Ahead Adder Using SP-D3l Logic Journal title: The International Journal of Technological Exploration and Learning Authors: K.Priyameenakshi| Assistant Professor, ECE Centre for Advanced research, Muthayammal Engg College Na... Subject(s): Engineering, Educational Technology
Enhancing NBTI Recovery in 7T SRAM Cell through Fine-Grained Recovery Boosting Journal title: International Journal of Research in Computer and Communication Technology Authors: S.Sasi Kiran, U Ravi Kanth, D Mahesh Varma Subject(s): Computer and Information Science, Telecommunications
Energy-Efficient, Noise-Tolerant CMOS Domino VLSI Circuits in VDSM Technology Journal title: International Journal of Advanced Computer Science & Applications Authors: Salendra.Govindarajulu, Dr.T.Jayachandra Prasad, C.Sreelakshmi, Chandrakala, U.Thirumalesh Subject(s):
ANALYSIS OF STATIC NOISE MARGIN FOR NOVEL POWER GATED SRAM Journal title: ICTACT Journal on Microelectronics Authors: Balotia Suresh Kumar, Amit Mahesh Joshi Subject(s):
A Comparative Analysis of SRAM Cells in 45nm, 65nm, 90nm Technology Journal title: International Journal of engineering Research and Applications Authors: Pinki Narah, Mrs. Sharmila Nath Subject(s):
A 65nm Technology CMOS Inverter Journal title: International Journal of Engineering and Science Invention Authors: S Rahul Subject(s):
