Design of Floating Point Arithmetic Logic Unit with Universal Gate Journal title: The International Journal of Technological Exploration and Learning Authors: Shraddha N. Zanjat| Electronics (Communication) S. D. College of Engineering Wardha, India, Dr.S.D.C... Subject(s): Engineering, Educational Technology
FPGA Implementation of Floating Point Reciprocator Using Binomial Expansion Method Journal title: International Journal of Science Engineering and Advance Technology Authors: B.Mahesh| M.Tech Scholar, Sri Sai Aditya Inst. Of Science & Technology, Surampalem, G.Sridevi| Assoc... Subject(s): Engineering, Medicine, Social Sciences, Pharmacy
Generic Parser Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Ms. Shrunkhala Satish Wankhede, Mr. Shubham Itankar, Mr. Sumit Borse Subject(s): Engineering, Applied Linguistics
Design High Speed Doubles Precision Floating Point Unit Using Verilog Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: V. Venkaiah, K. Subramanyam Subject(s): Engineering, Applied Linguistics
Implementation of a Fast Binary Floating Point Dadda Multiplier Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Thalari Mohan, G. Mukesh Subject(s): Engineering, Applied Linguistics
Comparative Study of Various Binary Floating Point Multiplier Techniques Using VHDL Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Rupali Umekar, Dr.Vasif Ahmed Subject(s): Engineering, Applied Linguistics
A Cost Effective Design of Reversible Single Precision Floating Point Multiplier Journal title: International Journal of Research in Computer and Communication Technology Authors: Malathi S.R, Akshaya Venugopal, Pavithra Sarathy Subject(s): Computer and Information Science, Telecommunications
Coverage Modeling For Verification Of Floating Point Arithmetic Units Journal title: International Journal of Research in Computer and Communication Technology Authors: T. Seshagiri, T.Vishnu Murthy Subject(s): Computer and Information Science, Telecommunications
Design of Dadda Algorithm based Floating Point Multiplier Journal title: International Journal of Research in Computer and Communication Technology Authors: A. Bhanu Swetha, V. Ramoji, S.Raghava Rao Subject(s): Computer and Information Science, Telecommunications
High Speed Implementation Of Fused Floating Point Add-Subtract Unit Journal title: International Journal of Research in Computer and Communication Technology Authors: Linsha L, Anoop E G, Benoy Abraham Subject(s): Computer and Information Science, Telecommunications
Design and Implementation of IEEE-754 Addition and Subtraction for Floating Point Arithmetic Logic Unit Journal title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) Authors: V.VINAY CHAMKUR , Under the guidance of Chetana.R Subject(s):
FPGA Design of Pipelined 32-bit Floating Point Multiplier Journal title: International Journal of Computational Engineering and Management IJCEM Authors: Shaifal, Sakshi Subject(s):
FPGA implementation of filtered image using 2D Gaussian filter Journal title: International Journal of Advanced Computer Science & Applications Authors: Leila kabbai, Anissa Sghaier, Ali Douik, Mohsen Machhout Subject(s):
Design of Floating Point Multiplier Using Residue Number System with Moduli Set {2n -1, 2n, 2n+1} Journal title: International journal of Emerging Trends in Science and Technology Authors: Praveen Amrutkar Subject(s):
DesignandAnalysisofMultimode Single Precision FloatingPointArithmetic Unit Using Verilog Journal title: International Journal of Scientific Research and Management Authors: Sachin saraswat Subject(s):
