Design and Verification of Serial Peripheral Interface using OVM Journal title: International Journal of Electronics Communication and Computer Technology Authors: Archana Ramesh R| Department of E.C.E Aditya Engineering College Kakinada, India, M.S.R.Sekhar| Depa... Subject(s): Computer and Information Science, Engineering
Implementation of a Fast Binary Floating Point Dadda Multiplier Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Thalari Mohan, G. Mukesh Subject(s): Engineering, Applied Linguistics
FBMC Modulation Scheme Implemented and Simulated in Verilog HDL for 5G Communications Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Sudeep Kumar Dhurua, T. Venkata Ramana, I. Sreenivasa Rao Subject(s): Engineering, Applied Linguistics
Implementation of High Speed Vedic Multiplier for Digital Signal Processing Using Multiplexer Based Adder Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Neha Tyagi, Neeraj Kumar Sharma Subject(s): Engineering, Applied Linguistics
Differentiate Different Methodology for Design of Vedic Multiplier Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Neha Tyagi, Neeraj Kumar Sharma Subject(s): Engineering, Applied Linguistics
Image Enhancement Techniques Using Verilog HDL And Simulation on HDL Simulator Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Anshu Sangal , Dr. Jyoti Kedia Subject(s): Engineering, Applied Linguistics
Design of Dadda Algorithm based Floating Point Multiplier Journal title: International Journal of Research in Computer and Communication Technology Authors: A. Bhanu Swetha, V. Ramoji, S.Raghava Rao Subject(s): Computer and Information Science, Telecommunications
Design and Verification of Serial Peripheral Interface Journal title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY Authors: M.Sandya1 , K.Rajasekhar2 Subject(s):
FPGA Implementation of Efficient Viterbi Decoder for Multi-Carrier Systems Journal title: International Journal of Modern Engineering Research (IJMER) Authors: K. Rajendar , K. Bapayya Subject(s):
Computer Aided Detection of Ischemic Stroke Using Verilog HDL Journal title: International Journal of Engineering Sciences & Research Technology Authors: P. Arivalagan*1 Subject(s):
Particle Swarm Optimization Algorithm for Leakage Power Reduction in VLSI Circuits Journal title: International Journal of Electronics and Telecommunications Authors: V.Leela Rani, M.Madhavi Latha Subject(s):
Review on Design of VGA Controller Using FPGA Journal title: International Journal of Science and Research (IJSR) Authors: Subject(s):
RASP-TMR: An Automatic and Fast Synthesizable Verilog Code Generator Tool for the Implementation and Evaluation of TMR Approach Journal title: International Journal of Advanced Computer Science & Applications Authors: Abdul Rafay Khatri, Ali Hayek, Josef Borcsok Subject(s):
FPGA Implementation of Key Exchange Algorithm Journal title: International Journal of engineering Research and Applications Authors: Vadde SeethaRama Rao, Krishna Bharat Battala Subject(s):
Fault Injection and Test Approach for Behavioural Verilog Designs using the Proposed RASP-FIT Tool Journal title: International Journal of Advanced Computer Science & Applications Authors: Abdul Rafay Khatri, Ali Hayek, Josef Börcsök Subject(s):
