Design of High speed Vedic MAC Unit using Urdhva Tiryakbhyam sutra & comparison with Conventional Architecture Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Arpita A. Koli, S.B. Kulkarni Subject(s): Engineering, Applied Linguistics
Implementation of a High-Speed RSD Based ECC Processor with Vedic Multipliers Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Chitra A, Sangeethalakshmi K, Prabhakar K Subject(s): Engineering, Applied Linguistics
Study on Performance of Vedic Multiplier Based On the Adders Used Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Rose Ann Mathew, Shruthi.H. Shetty, Ashwath Rao, Deepthi Dayanand Subject(s): Engineering, Applied Linguistics
Comparative Study on Implementation of Digital Arithmetic Circuit Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Lavanya B K, Sumiksha , Jose Alex Mathew, Praveen Kumar Konda Subject(s): Engineering, Applied Linguistics
Implementation of High Speed Vedic Multiplier for Digital Signal Processing Using Multiplexer Based Adder Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Neha Tyagi, Neeraj Kumar Sharma Subject(s): Engineering, Applied Linguistics
Differentiate Different Methodology for Design of Vedic Multiplier Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Neha Tyagi, Neeraj Kumar Sharma Subject(s): Engineering, Applied Linguistics
Performance Analysis Of Vedic Multiplier Using Reversible Logic In Spartan 6 Journal title: International Journal of Research in Computer and Communication Technology Authors: T Nagaveer, M Neelima, VNM Brahmanandam Subject(s): Computer and Information Science, Telecommunications
Design of High Speed Low Power Multiplier Using Nikhilam Sutra with Help of Reversible Logic Journal title: International Journal of Modern Engineering Research (IJMER) Authors: Manjeet Sankhwar Subject(s):
VLSI IMPLEMENTATION OF HIGH SPEED AREA EFFICIENT ARITHMETIC UNIT USING VEDIC MATHEMATICS Journal title: ICTACT Journal on Microelectronics Authors: Vijeyakumar K N, Kalaiselvi S, Saranya K Subject(s):
Design of 32 Bit Vedic Multiplier using Carry Look Ahead Adder Journal title: GRD Journal for Engineering Authors: Divya. P, Surya. K, Uma Narayani. R, Vidhiya. B, Sathya. G Subject(s):
Adaptive Hold Aware Clock Gated MAC Journal title: International Journal of engineering Research and Applications Authors: C Ashok Kumar, B.K MADHAVI, K.Lal Kishore Subject(s):
Design And Implementation Of High Speed Vedic Multiplier Journal title: International Journal of engineering Research and Applications Authors: Hitansu Sekhar Sahu, Khirod Kumar Sethi, Tejesh Kumar Chaudhary, Hemant Kumar Besra, Prasanta Kumar... Subject(s):
